The Bt878A acts as a PCI bridge for the Kfir chip. All communication to the Kfir is done through the GPIO pins of the bttv. A programmable Gate array chip (Altera Flex 6016) is used to provide the connections between the Kfir, Bt878A GPIO pins, ADSP and clock chip.
The Bt878A and the Altera chip have the following connections:
Bt878A Pin | Function | Altera Pin | Function |
86 | GPIO 0 | 124/125 | General Logic / Data |
85 | GPIO 1 | 122 | General Logic |
84 | GPIO 2 | 121 | General Logic |
83 | GPIO 3 | 119 | General Logic |
82 | GPIO 4 | 118 | General Logic |
81 | GPIO 5 | 116 | General Logic |
80 | GPIO 6 | 115 | General Logic |
79 | GPIO 7 | 113 | General Logic |
78 | GPIO 8 | 112 | General Logic |
77 | GPIO 9 | 110 | General Logic |
76 | GPIO 10 | 109 | General Logic |
75 | GPIO 11 | 108 | General Logic |
72 | GPIO 12 | 106 | General Logic |
71 | GPIO 13 | 101 | General Logic |
70 | GPIO 14 | 99 | General Logic |
69 | GPIO 15 | 98 | General Logic |
68 | GPIO 16 | 96 | General Logic |
67 | GPIO 17 | 96 | General Logic |
61 | GPIO 18 | 95 | General Logic |
60 | GPIO 19 | 93 | General Logic |
59 | GPIO 20 | 128 | DCLK |
58 | GPIO 21 | 87 | General Logic |
57 | GPIO 22 | 86 | General Logic |
56 | GPIO 23 | 53 | nConfig |
The DATA, DLCK and nConfig pins are used to configure the altera. Once the altera is configured, the GPIO pins 0 to 15 are used as a 16 bit databus. The GPIO pins 16,17,18,19,21,22 are used as control pins. I'm still investigating the exact functions of the control pins.